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TCM Decoder IP Core (TDEC01)

    The combination of the convolutional coding and modulation scheme, known as Trellis-Coded Modulation (TCM), can achieve significant coding gain without reducing the data rate or requiring more bandwidth.
    The TCM can be found in many communication systems such as CCITT modems (V.17, V.32, etc), wireless, xDSL or IEEE 802.3ab Gigabit Ethernet.
    The general purpose TCM decoder IP core is using the 8-PSK & 16/32/64-QAM signal constellation and an 8-state systematic encoder for subset selection. The information bits recovery method is the Viterbi algorithm.
    The register-exchange method is implemented and the survivor memory length is parameterizable, according with performance required. Also the trace-back decoding method can be available.
    In the Radix-4 Add-Select-Compare Unit, modulo-normalization or simple normalization for the accumulated path metrics can be used.
    The register-exchange/trace-back process is controlled by a finite state machine.
    The TCM decoder IP core can be relatively easy to modify for the IEEE 802.3ab Gigabit Ethernet standard. In this case a 4D PAM-5 modulation scheme is employed. The multi-dimensional modulation requires another approach for the Branch Metrics Unit: 2D BMU diagram , 4D BMU diagram .
Selectable modulation: 8-PSK or 16/32/64-QAM
8-states TCM encoder, rate R=2/3
Register Exchange decoding method for lower latencies
Soft decisions - starting with 4 bits wide
Selectable quantization mapping
Plots using files generated by Verilog simulation
Matlab model provided as well
Synthesis Results*
Technology States SDec Gates  f [MHz]
ASIC - 0.25 m 8 5 bits 18k 163
FPGA - Xilinx Virtex 8 5 bits 76% xc2v250 128
8 5 bits 95% xcv100e 63
*) 8-PSK only
Test Results
Technical Support
Complete RTL & testbench code
PLI user task code for AWGN/ADC/mod blocks
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